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Introduction

Characterization, Evaluation, and Development of High Performance Network Services on Multi-Core Architectures - [funded by ICT R&D, PKR 11.7 M]



This project is funded by the ICT fund and the primary objective of this project is to research on multi-core processor performance characterization and evaluation of CPU-memory subsystem performance disparity for high-throughput networking applications.

Multi-core processor architectures offer unique challenges and opportunities for all types of software applications compared to traditional single core architectures. In this research, our focus is on networking applications on current and future generation of multi-core processor based systems. Multi-core processors bring the compute power of high-end parallel systems within a single chip. While this immense compute power can enable highly intelligent services within the network infrastructure, multi-core systems inherit all the challenges of traditional parallel systems. Multiple cores on a chip also enable utilizing exponentially increasing link speeds as well; however, memory access latencies are not reducing at the same rate. Our research objective is to investigate various parallel programming paradigms in terms of their suitability for network applications to be conducive for intelligent services for 1 Gbps networks. In order for this effort to be relevant for the industry, we adopt a measurement-based evaluation approach to conduct this research.
Under this project an extensible multithreaded Multicore Processor Architecture and Communication MPAC library is developed which will facilitate in development of multithreaded benchmarks for multi-core processor based systems. These benchmarks will assist in determining the baseline performance of cache/memory, processor floating point and integer units, and end-to end network. These benchmarks will facilitate in measurement based studies of multi-core systems and will provide the basis for efficiently parallelizing the network applications with memory, cache, and interconnection subsystem constraints of the target multi-core systems.
A measurement based analysis for these developed benchmarks will be performed to tune them for optimization at 1 Gbps networks using profiling tools and instrumentation systems