Dr. Abdul Waheed, Adjunct Professor, Al-Khawarizmi Institute of Computer Science (KICS), University of Engineering and Technology (UET), Lahore, PAKISTAN

Abdul Qadeer, Research Manager, Al-Khawarizmi Institute of Computer Science (KICS), University of Engineering and Technology (UET), Lahore, PAKISTAN

Hasan Jamal, Sr. Research Associate, Al-Khawarizmi Institute of Computer Science (KICS), University of Engineering and Technology (UET), Lahore, PAKISTAN

Ghulam Mustafa, Sr. Research Associate, Al-Khawarizmi Institute of Computer Science (KICS), University of Engineering and Technology (UET), Lahore, PAKISTAN

Contact Information:

Multiple cores per processor has emerged as an architecture of choice to allow continued benefits due to Moore's Law. However, this choice brings along some of the unique challenges to memory architecture design and software development to the main-stream that were once hallmarks of high-end, high-performance, and high-price parallel computing. This short-duration course will focus on state-of-the-art programming paradigms that are useful for software development for multi-core architectures: explicit message-passing, shared address space based computing, multi-threading, map-reduce, and Compute Unified Device Architecture (CUDA). We shall provide a brief introduction to each of these paradigms with emphasis on hands-on experience to enable students to become familiar with them for developing parallel applications. Students will have a unique opportunity to learn parallel application development on Intel quad-core processor based servers and Sony Playstation 3 games console as target multi-core platform.

C and Java programming languages on Linux.

• To introduce the students to following state-of-the-art parallel programming paradigms: message-passing, shared-memory multiprocessing, multithreading, map-reduce, and CUDA;
• To initiate the students into developing parallel applications on multi-core processor based systems using suitable programming paradigms; and
• To provide students with a unique opportunity to learn using Sony Playstation 3 as a cost-effective multi-core processor based parallel computing architecture.

1. Demonstrate basic understanding of parallel programming paradigms;
2. Show ability to write parallel applications for multi-core processor based systems; and
3. Be aware of performance implications of multi-core architectures to their parallel applications.

• None

• Course material

• Lectures 40%
• Labs 50%
• Quizzes 10%

Students are responsible to attend all lectures and laboratory sessions to fulfill the completion requirements of this short course. Due to short duration, no make up lectures, labs, or quizzes can be arranged. Absence from a lab or quiz will result in zero credit. Each quiz will be conducted at the end of the subsequent lecture.

Registration Fee:

Students: Rs. 500/=
Professional: Rs 2000/=

Instructor’s Short Biography:

Dr. Abdul Waheed is currently working as a senior performance engineer at Cisco Systems in San Jose, California, USA. He was an assistant professor in Computer Engineering (COE) Department at KFUPM, Dhahran, Saudi Arabia from 2001 to 2004. Before joining the KFUPM, he was working at Inktomi Corporation in Foster City, California, USA, as a performance engineer in network products division. He was a research staff member at NASA Ames Research Center, Moffett Field, California, USA, from May 1997 until July 2000. He held a summer position in Concurrent Computing Division at Hewlett-Packard Research Laboratories in Palo Alto, California, USA in 1994. He received a B.Sc. degree with honors in Electrical Engineering from University of Engineering and Technology, Lahore, Pakistan in 1991. He received MS and PhD degrees in Electrical Engineering from Michigan State University (MSU), East Lansing, Michigan, USA in 1993 and 1997, respectively. His research interests span performance evaluation of high performance computing and networking architectures, parallelization for multi-core architectures, cloud computing, and performance tools. He initiated High Performance Computing and Networking (HPCN) effort at KICS/UET in the summer of 2006 and has been providing mentoring and leadership support to the group. HPCN team developed Multi-core Processor Architecture and Communication (MPAC) benchmark under his leadership and released to the open source community in August 2008. He has published over thirty refereed conference and journal papers on related topics. He is a member of the IEEE Computer Society.

Abdul Qadeer received a B.Sc. degree in Computer Science from FAST (Foundation for Advancement of Science and Technology), Lahore, Pakistan in 2001. He received a M.S. Degree in Computer Science in 2006 from Lahore University of Management Sciences (LUMS), Pakistan. Moreover he received a M.S. degree in Computer Science from University of Southern California (USC), Los Angeles, CA in 2008. Abdul Qadeer’s areas of interest are large scale distributed systems and cloud computing. Currently he is involved in a project related to domain specific search strategies to build effective search engine seeds. He developed a framework for web data analysis that mainly covers the current IPv4 allocation, which is primarily based on Google’s MapReduce paradigm.

Mohammad Hasan Jamal received a B.Sc. degree with honors in Computer and Information Engineering from International Islamic University Malaysia, Kuala Lumpur, Malaysia in 2005. He received a MS degree from Electrical Engineering Department, UET, Lahore, Pakistan, specializing in Computer Engineering in December 2008. Hasan works in the general areas of performance engineering, HPC, and parallel and distributed systems. He is currently working on the development of performance measurement and profiling tools. He was actively involved in the setup of High Performance Computing and Networking Lab (HPCNL) at KICS in UET, Lahore. He was one of the leading contributors to the recently completed, ICT R&D funded, project titled “Characterization, Evaluation, and Development of High Performance Network Services on Multi-Core Architectures”. He has three publications in peer reviewed conferences based on this effort. He is a member of the IEEE Computer Society.

Ghulam Mustafa’s areas of interest are HPC, scientific computing & visualization, parallel programming, and energy efficient programming. Recently, he has completed the development of multithreaded benchmarking suite (MPAC) for performance analysis of multi/many core systems. He was the lead developer to enable its initial release in 2008 and current release of version 1.1 to open source. He is a PhD candidate in Computer Science Department at UET.

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